RISC-V Assembly Language Programming

RISC-V
Assembly Language Programming

John Winans

August 3, 2023

This document is made available under a Creative Commons Attribution 4.0 International License. See chapter C.4 for more information.

Download your own copy of this book from GitHub here: https://github.com/johnwinans/rvalp.

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Contents
Preface
1 Introduction
1.1 The Digital Computer
1.2 Instruction Set Architecture
1.3 How the CPU Executes a Program
2 Numbers and Storage Systems
2.1 Boolean Functions
2.2 Integers and Counting
2.3 Sign and Zero Extension
2.4 Shifting
2.5 Main Memory Storage
3 The Elements of a Assembly Language Program
3.1 Assembly Language Statements
3.2 Memory Layout
3.3 A Sample Program Source Listing
3.4 Running a Program With rvddt
4 Writing RISC-V Programs
4.1 Use ebreak to Stop rvddt Execution
4.2 Using the addi Instruction
4.3 todo
4.4 Other Instructions With Immediate Operands
4.5 Transferring Data Between Registers and Memory
4.6 RR operations
4.7 Setting registers to large values using lui with addi
4.8 Labels and Branching
4.9 Jumps
4.10 Pseudoinstructions
4.11 Relocation
4.12 Relaxation
5 RV32 Machine Instructions
5.1 Conventions and Terminology
5.2 Addressing Modes
5.3 Instruction Encoding Formats
5.4 CPU Registers
5.5 memory
A Installing a RISC-V Toolchain
A.1 The GNU Toolchain
A.2 rvddt
A.3 qemu
B Floating Point Numbers
B.1 IEEE-754 Floating Point Number Representation
C The ASCII Character Set
C.1 NAME
C.2 DESCRIPTION
C.3 NOTES
C.4 COLOPHON
D Attribution 4.0 International
Bibliography
Index